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I2S Bus Transceiver



I2S is a popular bus protocol used by audio codec ICs to transfer PCM samples. PulseRain Technology's silicon proven I2S transceiver offers a seamless solution for audio codec / vocoder integration. It can be configured flexibly for various sample rate and bit width. Due to its smart elastic buffer design, CDC (Clock Domain Crossing) and flow control are turned into cinches during IP integration.



  • Licenses are available for single project, multi-project or unlimited project


  • NO per-chip royalties


  • IP formats available for purchase:

    • RTL source code in System Verilog

    • Obfuscated RTL source code

    • Netlist targeted to a specific FPGA technology



Please contact us to request a quote if you are interested.

Design Resources


  • Product Datasheet





  • Simulation Library

Available upon request


  • ICD (Interface Control Document)

Available upon request


  • Simulator Supported:

    • Modelsim


  • Commercial Evaluation Board

This IP has been verified on an Altera Cyclone III Development Kit, plus a daughter card from Terasic for audio codec. The FPGA used on board is Cyclone III EP3C120F780



2010 - present

2010 - present

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